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Single-chip Cloud Computer – Opening Remarks By Intel CTO, Justin Rattner

December 3rd, 2009

From the live webcast at the Clift Hotel in San Francisco on December 2, 2009, Intel CTO Justin Rattner delivers the opening remarks on the Single-Chip Cloud Computer, the latest Intel Labs milestone in the Intel Tera-scale Computing Research Program.

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Single-chip Cloud Computer – Microsoft Visual Studio + SCC Message Passing Environment

December 3rd, 2009

In this demo with Jonathan Ross, Software Architect, Microsoft:

Bringing parallel programming to mainstream software developers is one of the main goals of Intel’s Tera-scale research program. Microsoft Visual Studio is a widely popular software development environment that can also be used for developing parallel applications to run on the SCC many-core platform.

  • Visual Studio 2008 is demonstrated working together with Intel’s research SCC message passing environment.
  • This allows programmers to directly take advantage of the cloud-like message passing architecture of SCC.
  • Proves how easy it is for a programmer to setup a project, edit, compile and run applications that take advantage of the unique features of the experimental SCC.

This podcast is from the live webcast at the Clift Hotel in San Francisco on December 2, 2009. This demo followed Intel CTO, Justin Rattner’s opening remarks on the Single-Chip Cloud Computer, the latest Intel Labs milestone in the Intel Tera-scale Computing Research Program.

See photos on Flickr

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Single-chip Cloud Computer – Energy Efficiency with Real-Time Advanced Power Management

December 3rd, 2009

In this demo with Rob F. Van der Wijngaart, Senior Software Engineer, Intel:

The experimental chip was designed to operate from as high as 125W to as low as 25W by providing a variety of advanced capabilities to manage power consumption. Power use is largely determined by the cores’ clock speeds and operating voltages. The chip has a unique ability to mix and match voltages and clock speeds for the different cores, or even to turn off entire regions of the chip when not needed. These capabilities can be controlled by software, allowing the application or operating system to intelligently manage power consumption, adapting in real time to use only the energy that is really needed. The demonstration displays how power levels for different sections of the chip change in response to the needs of a series of tasks whose power requirements vary over time.  The tasks of the application are modeled after parallel computations.

This podcast is from the live webcast at the Clift Hotel in San Francisco on December 2, 2009. This demo followed Intel CTO, Justin Rattner’s opening remarks on the Single-Chip Cloud Computer, the latest Intel Labs milestone in the Intel Tera-scale Computing Research Program.

See photos on Flickr

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Single-chip Cloud Computer – Programming for the 3D Internet: JavaScript Farm on a Chip

December 3rd, 2009

In this demo with Adam Welc, Ph.D., Senior Research Scientist, Intel:

As Justin Rattner emphasized in his Supercomputing 2009 keynote in November, the Internet is poised to transition from flat, 2D experiences to more immersive 3D experiences. Bringing real world physics to 3D graphics is essential to making these emerging online interactions true-to-life. For instance, realistic, physics-based cloth modeling could enable both virtual clothing design as well as virtual dressing rooms that allow you to “try out” clothes on your virtual body and see how they would actually fall on you and match your specific skin tone. Intel Labs have demonstrated JavaScript, the language used broadly to create interactive web pages, taken to new levels of capability. Although JavaScript is used in every browser, it’s mainly used to operate very simple tasks like processing web forms and has performance problems running more complicated activities. JavaScript has been underutilized until now due to the lack of programming environment. Intel Labs have worked on a programming model that allows better utilization, takes better advantage of newer and future high-core count processors, and can be immediately deployed without requiring any modifications to the underlying infrastructure.

  • By treating the prototype chip as a “server farm” the chip is able to divide the work involved in calculating the motion of interactive cloth.
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  • Researchers use the “Actor” model, commonly used in server farms, which treats each core as an independent worker to own and process one piece of the cloth.
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  • Leveraging the standard HTTP web protocol, the browser distributes pieces of the cloth across the actor server farm, allows them to calculate the location of their piece of the cloth at the next time step, collects the results, and displays the combined image.

This podcast is from the live webcast at the Clift Hotel in San Francisco on December 2, 2009. This demo followed Intel CTO, Justin Rattner’s opening remarks on the Single-Chip Cloud Computer, the latest Intel Labs milestone in the Intel Tera-scale Computing Research Program.

See photos on Flickr

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Single-chip Cloud Computer

December 3rd, 2009

Intel Labs has created an experimental Single-chip Cloud Computer, (SCC) a research microprocessor containing the most Intel Architecture cores ever integrated on a silicon CPU chip 48 cores. It incorporates technologies intended to scale multi-core processors to 100 cores and beyond, such as an on-chip network, advanced power management technologies and support for message-passing.

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Carry Small, Live Large: Enriching the Living Room, Classroom, Office and Automobile – Chuck Smith – Research@Intel Day

June 18th, 2009

The concept called “carry small, live large” is Intel Lab’s vision to deliver an enhanced mobile device experience by using wireless connectivity to locate and utilize nearby resources such as remote displays and storage devices, while sing embedded sensors and personal profile information to deliver personal, context-driven user experience.

Chuck Smith demonstrates at Research@Intel Day.

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TEEVE: Tele-immersive Environment for EVErybody – Raoul Rivas – Intel@Research Day

June 18th, 2009

Last year, Intel and Microsoft funded the establishment of a Universal Parallel Computing Research Center (UPCRC) at the University of Illinois at Urbana-Champaign with the goal of brining parallel computing applications to the mainstream. Researchers demonstrate an application in which attendees can participate in a tele-immersive 3D environment. Participants in two separate spaces engage and interact in a 3D virtual environment to complete tasks or play games such as Tele-Immersive Saber Fencing or Tele-Immersive Jump Rope .

Raoul Rivas demonstrates at Research@Intel Day.

For more information see:
The TEEVE Project

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Confrontational Computing – Are You Being Duped – Rob Ennals – Research@Intel Day

June 18th, 2009

“The Web” is nearly synonymous with “information”. While much of this information is useful, a significant amount could be characterized as false, misleading, or biased. Confrontational Computing is a research project from Intel Labs, Berkeley to create a new tool that makes it easier for readers to pick through this minefield. The tool automatically highlights text snippets that disagree with information found elsewhere. Clicking on a highlighted snippet reveals an argument graph showing best sources on either side of the issue. The links are maintained by a community of users, creating a new venue for rich interaction.

Rob Ennals, Senior Researcher at Intel, explains at Research@Intel Day.

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Wireless Resonant Energy Link: Efficient Wireless Power – Research@Intel Day

June 18th, 2009

In the past few years, we have experienced a dramatic rise in the number of electronic devices – cell phones, digital cameras, laptops, etc… that we use in our everyday lives. Most of these devices are powered by batteries which need to be recharged often. The costs, resources and management of multiple, incompatible power cords, bricks, etc… are already a nightmare for the typical user. WREL, in contrast to surface based systems (”power pads”), demonstrates wireless power transfer whose efficiency can be nearly independent of orientation, distance, and load over a wide range of operating conditions. This technology could allow people to cut that last cord.

Intel Research Scientist, Emily Cooper Ph.D., demonstrates from Research@Intel Day.

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Research@Intel Day Keynote With Justin Rattner

June 18th, 2009

Justin Rattner Keynote Address from Research@Intel Day 2009.

Justin Rattner, 59, is vice president and chief technology officer (CTO). He is also an Intel Senior Fellow and head of Intel Labs. In the latter role, he directs Intel’s global research efforts in microprocessors, systems, and communications including the company’s disruptive research activity.

In 1989, Rattner was named Scientist of the Year by R&D Magazine for his leadership in parallel and distributed computer architecture. In December 1996, Rattner was featured as Person of the Week by ABC World News for his visionary work on the Department of Energy ASCI Red System, the first computer to sustain one trillion operations per second (one teraFLOPS) and the fastest computer in the world between 1996 and 2000. In 1997, Rattner was honored as one of the Computing 200, the 200 individuals having the greatest impact on the U.S. computer industry today, and subsequently profiled in the book Wizards and Their Wonders from ACM Press.

Rattner has received two Intel Achievement Awards for his work in high performance computing and advanced cluster communication architecture. He is a member of the executive committee of the Intel’s Research Council and serves as the Intel executive sponsor for Cornell University where he is a member of the External Advisory Board for the School of Engineering. Rattner is also a trustee of the Anita Borg Institute for Women and Technology.

Rattner joined Intel in 1973. He was named its first Principal Engineer in 1979 and its fourth Intel Fellow in 1988. Prior to joining Intel, Rattner held positions with Hewlett-Packard Company and Xerox Corporation. He holds B.S. and M.S. degrees from Cornell University in electrical engineering and computer science.

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