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IT Best Practices: Intel’s silicon design engineers need significant increases in computing capacity—both on their workstations and on data center servers—to deliver each new generation of silicon chips. To meet those requirements, Intel IT conducts ongoing throughput performance tests, [See the full post…] |
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Categories: Information Technology, Intel, Intel IT, IT White Papers, IT@Intel Tags: EDA, EDA Throughput, Electronic Design Automation, high performance computing, HPC, information technology, Intel, Intel IT, Intel Xeon, Intel Xeon Processor Scalable Family, IT Best Practices, IT Business Value, IT Whitepaper, IT@Intel, pdf
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IT Best Practices: Silicon chip design engineers at Intel face the challenges of integrating more features into ever-shrinking silicon chips, resulting in more complex designs. The increasing design complexity creates large design workloads that have considerable memory and compute [See the full post…] |
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Categories: Information Technology, Intel, Intel IT, IT White Papers, IT@Intel Tags: 329537-001, Design Computing, EDA, Electronic Design Automation, information technology, Intel, Intel IT, Intel x25-e extreme SATA solid-state drive, IT Best Practices, IT Business Value, IT Whitepaper, IT@Intel, MLC, multi level cell, server, silicon design, single-level cell, SLC, solid-state drive, SSD, swap drive, swap space, workload
Categories: Information Technology, Intel, Intel IT, IT White Papers, IT@Intel Tags: data center, EDA, Intel IT, IT Best Practices, IT Business Efficiency, IT Business Value, Workstations, Xeon
Categories: Information Technology, Intel, Intel IT, IT@Intel Tags: 5500, EDA, Electronic Design Automation, enterprise workloads, Intel, Shesha Krishnapura, Sudip Chahal, tco, Xeon
Categories: Corporate, Information Technology, Intel, Intel IT, Intel-OpenPort, IT@Intel Tags: Design Computing, EDA, Electronic Design Automation, high performance computing, HPC, IA, Intel, Intel architecture, Intel Performance Libraries, Intel Threading Building Blocks, multi-core processors, multi-threaded code, multi-threaded software, optimization, Shesha Krishnapura, Tapeout, Threading Analysis, Tim Phillips, VTune
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The current uptake in high performance computing means mostly good things, but it also comes with a few built-in challenges. The paradox of this particular progress is this: when you scale hardware, you oftentimes scale power consumption, right along with [See the full post…] |
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Categories: Information Technology, Intel, Intel IT, Intel-OpenPort, IT@Intel Tags: 45nm, Design Computing, EDA, Electronic Design Automation, high performance computing, HPC, IA, Intel, Intel architecture, Intel Performance Libraries, Intel Threading Building Blocks, optimization, servers, Shesha Krishnapura, Tapeout, Threading Analysis, Tim Phillips, VTune, Xeon