Sprint’s C3PO – Intel Chip Chat: Network Insights – Episode 105
In this archive of a livecast from NFV World Congress 2017 in San Jose, Arun Rajagopal, Technology Architect for NFV and Wireless Core at Sprint, explains how the future of the network at Sprint is built. Sprint is rethinking how wireless core is built and architected, which led to the creation of Clean CUPS Core for Packet Optimization (C3PO). C3PO brings the control plane, user or data plane and SDN controller together to create the evolved packet core (EPC) function. The components are open sourced and available to the community through OpenDaylight and CORD. Arun discusses why they partnered with Intel on this project, and what performance they achieved on the Intel Xeon processors E5-2680 v4. Performance shows a near-perfect linear scale, and the collaboration with Intel continues as they look at horizontal scale.
To learn more about C3PO, visit: