PCI Express tagged posts:

Under the Hood: Intel Solid-State Drives for a More Flexible Data Center

Under the Hood: Intel Solid-State Drives for a More Flexible Data Center

In this Intel Chip Chat Under the Hood video podcast: The coming software defined infrastructure (SDI) revolution will require a flexible data center that bursts in and out of capacity more efficiently than current architectures. The Intel Solid-State Drive Data ...
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Categories: data centers, Featured, HD Video, Information Technology, Intel, Intel Chip Chat, Intel Chip Chat: Under the Hood Tags: , , , ,

NVM Express: Low latency, High Performance Interface for SSDs – Intel Chip Chat – Episode 202

September 14th, 2012 |
NVM Express: Low latency, High Performance Interface for SSDs – Intel Chip Chat – Episode 202

In this Intel Chip Chat audio podcast with Allyson Klein: Amber Huffman from Intel, Sumit Puri from LSI, and Steve Sardella from EMC visit Chip Chat for an in-depth discussion of NVM Express. NVMe is a flexible, scalable host controller ...
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Categories: Audio Podcast, Corporate, EMC Corporation, Intel, Intel Chip Chat, Intel Developer Forum, LSI - Listen In Tags: , , , , , , , , , , , , , , ,

Intel Xeon Processor E5 Launch Wrap Up – Intel Chip Chat – Episode 189

Intel Xeon Processor E5 Launch Wrap Up – Intel Chip Chat – Episode 189

In this Intel Chip Chat audio podcast with Allyson Klein: Frequent guest Dylan Larson, Director of Server Platform Marketing, stops by to complete our coverage of the Intel Xeon processor E5 launch. He discusses the benefits of the new platform, ...
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PCI Express 3.0* Intel Chip Chat – Episode 36

November 19th, 2008 |
PCI Express 3.0* Intel Chip Chat – Episode 36

PCIe 3.0 will double the bandwidth of the previous generation of this I/O interconnect and will improve power management of platforms – from notebooks to new generation servers.

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PCI Express* 2.0 Speeds Innovation – Intel Chip Chat – Episode 4

PCI Express* 2.0 Speeds Innovation – Intel Chip Chat – Episode 4

David Fair explains how PCI Express* Gen 2 increases speed, device interoperability and bandwidth. He also provides insight into the Geneseo proposal that Intel and IBM gave to PCI-SIG.

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